Showing 13 - 22 of 22
Rugged CameraLink using Xilinx Kintex-7 FPGA
Case Study

Rugged CameraLink using Xilinx Kintex-7 FPGA

Curtiss-Wright was recently challenged to provide a direct CameraLink interface to a Kintex-7 FPGA without the need for ChannelLink transceivers, thereby allowing an existing “generic” digital FPGA solution to be used. Read about the solution we developed.

12/20/2017
Reducing Development Time for High-Speed Embedded Data Collection
Case Study

Reducing Development Time for High-Speed Embedded Data Collection

High-performance storage solution for use on UAV with a minimum of 1TB of secure storage capacity to capture and store data and video from a variety of sensors.

05/16/2017
Pods: Bridging the SWaP-constrained Gap Between Old and New
Case Study

Pods: Bridging the SWaP-constrained Gap Between Old and New

A customer approached Curtiss-Wright with a requirement of upgrading to modern COTS hardware while keeping legacy proprietary infrastructure. Read about the SWaP solution Curtiss-Wright developed here.

01/27/2017
Data Sheet

XF07-518 Analog I/O XMC Data Sheet

XF07-518 4x 500 MSPS 14-bit Analog I/O XMC AMD Kintex 7 XC7K325T FPGA.

Data Sheet

XF07-RLDRAM Data Sheet

XF07-RLDRAM AMD Kintex 7 Based Co-Processor XMC with HSS I/O.

Data Sheet

XMC-4701 XMC Capture Module Data Sheet

XMC-4701 XMC Capture Module with SDI and Analog Interfaces.

Data Sheet

XMC-603 XMC MIL-STD-1553 Card Data Sheet

Quad-Channel MIL-STD-1553 Module.

Data Sheet

XF07-516 Analog IO Digital Receiver XMC Data Sheet

XF07-516 4x 250 MSPS 16-bit Analog I/O XMC AMD Kintex 7 XC7K325T FPGA.

Data Sheet

XMC-120 Intel Atom Single Board Computer Data Sheet

XMC-120 Intel Atom Single Board Computer Data Sheet.

FPGA
White Paper

How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format White Paper

Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations.